END TERM EXAMINATION

Paper Code: BCA-106

SECOND SEMESTER [BCA]

MAY — JUNE 2015

## Subject: Digital Electronics

(Batch 2011 onwards)

**Time**: 3 Hours

**Maximum Marks**: 75

**Note**: Attempt any five questions including Q.No 1 which is compulsory.

Select one question from each unit.

**Question 1**:

(a) State and Prove the Demorgan’s theorems. (4)

(b) Design a full adder using the NAND gates only. (4)

(c) What is a multiplexer? Design a 32 to 1 multiplexer using the 8 to 1 multiplexers. (4)

(d) What is a D ﬂip ﬂop? Show how SR ﬂip ﬂop can be converted to D flip ﬂop.(4)

(e) What is a ripple counter? Explain the difference between the performance of asynchronous and synchronous counters. (4)

(f) Explain the working of bi directional shift register with logic diagram. (5)

__UNIT-I__

**Question 2**:

(b) What are Universal gate? Obtain EX-OR operation with universal gates. (3.5)

(c) Convert the following octal numbers to hexadecimal numbers: (3)

(i) 137

(ii) 1275

(iii) 673

**Question 3**:

(a) Simplify the expression Y = Σ

_{m}(7,9,10,11,12,13,14,15) using the k-map method.

(b) Realize Y = A + BCD using NAND gates only.

__UNIT-II__

**Question 4**:

(b) What is binary multiplier? Discuss the multiplier using shift method. (6)

**Question 5**:

(a) Explain the working of BCD to seven segment decoder with diagram. (6)

(b) What is an encoder? Discuss the design of octal to binary encoder. (6.5)

__UNIT-III__

**Question 6**:

Discuss and explain the working of master slave JK Flip ﬂop. What are its advantages? ( 12.5)

Question 7:

What is shift register? Give its classification and explain the working of each type diagram. (12.5)

__UNIT IV__

**Question 8**:

What is modulo counter? Design a MOD-6 counter by giving all design steps. (12.5)

**Question 9**:

Explain the following: (a) RAM (b) PLA (12.5)

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